Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)

Table 5

Resource utilization of the key components of the implemented programmable logic on ZU9EG FPGA (AXIOM board).

Component	LUT (%)	LUTRAM (%)	FF (%)	BRAM (%)	GT (%)
DF-Threads	10.03	1.8	6.01	5.43	—
NIC [4]	41.36	8.96	19.29	15.19	50