Embedded Parallel Implementation of LDPC Decoder for Ultra-Reliable Low-Latency Communications

Table 1

CPU run-time in cycles spent by the algorithm block.

Code size	V2C computation	C2V computation	Decision	Initialization	Syndrome
(9216, 4608)	7 001 278	2 959 459	173 541	125 181	253 439
(4608, 2304)	3 491 957	1 472 692	120 639	51 508	115 542
(2304, 1152)	1 725 562	739 557	43 557	32 895	72 600
(1152, 576)	862 872	368 852	23 929	15 534	35 676
(576, 288)	430 294	185 021	9 671	9 534	16 382