Transformation of Holes Emission Paths under Negative Bias Temperature Stress in Deeply Scaled pMOSFETs

<div>The time traces of gate current, electron current, and hole current under NBT stress (−1.9 V) at <svg height="9.01192pt" id="M49" style="vertical-align:-0.2063904pt" version="1.1" viewbox="-0.0498162 -8.80553 42.9038 9.01192" width="42.9038pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M655 676H628C608 656 600 650 571 650H156C118 650 114 651 102 676H77C63 615 45 548 24 485L60 486C81 531 97 562 114 580C134 603 148 611 252 611H308L217 127C201 41 196 38 105 32L98 0H384L393 32C300 38 288 41 304 127L393 611H466C553 611 571 604 582 580C592 559 597 530 595 485L630 489C636 548 645 624 655 676Z" id="g50-85"></path><glyph.data ascent="3443" descent="-2856" horiz-adv-x="673" vert-adv-y="673"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,12.064,0)"><path d="M556 331V384H55V331H556ZM556 140V193H55V140H556Z" id="g54-34"></path><glyph.data ascent="3443" descent="-2856" horiz-adv-x="611" vert-adv-y="611"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,23.683,0)"><path d="M290 377C321 398 342 415 358 430C378 450 389 473 389 502C389 578 329 635 238 635H237C184 635 137 610 109 578L64 515L88 493C112 529 154 573 208 573S303 542 303 482C303 409 233 370 141 341L149 308C165 313 190 319 215 319C272 319 341 283 341 193C342 98 292 43 222 43C163 43 122 72 96 94C88 101 79 100 70 94C61 87 47 73 46 60C44 47 48 37 62 23C76 10 118 -12 165 -12C238 -12 430 62 430 223C430 297 379 359 290 375V377Z" id="g50-52"></path><glyph.data ascent="3443" descent="-2856" horiz-adv-x="487" vert-adv-y="487"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,30.014,0)"><path d="M414 144C384 79 371 75 317 75H135L276 221C367 316 408 376 408 465C408 570 327 635 237 635C179 635 131 609 100 575L42 494L67 471C94 510 138 565 205 565C277 565 321 517 321 435C321 348 258 270 195 195C146 137 88 81 33 26V0H411C423 44 433 88 446 135L414 144Z" id="g50-51"></path><glyph.data ascent="3443" descent="-2856" horiz-adv-x="487" vert-adv-y="487"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,36.345,0)"><path d="M245 635C92 635 37 457 37 312C37 149 91 -12 244 -12C395 -12 449 166 449 312C449 469 395 635 245 635ZM243 598C332 598 358 454 358 312C358 173 334 26 245 26C158 26 128 174 128 313S152 598 243 598Z" id="g50-49"></path><glyph.data ascent="3443" descent="-2856" horiz-adv-x="487" vert-adv-y="487"></glyph.data></g></svg> K by using carrier separation technique.</div>

Advances in Condensed Matter Physics

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Figure 3

Figure 3: Transformation of Holes Emission Paths under Negative Bias Temperature Stress in Deeply Scaled pMOSFETs 