Thermal-Aware Test Schedule and TAM Co-Optimization for Three-Dimensional IC

Table 2

The second test case.

Die	Circuit	Die area (mm^2)	Die power (W)
Die 4	p93791	7.30 × 4.21	42.97
Die 3	p22810	3.37 × 2.92	13.79
Die 2	p34392	2.54 × 2.86	10.16
Die 1	f2126	3.29 × 1.32	6.09
Die 0	d695	1.33 × 1.97	3.63