Perimeter Degree Technique for the Reduction of Routing Congestion during Placement in Physical Design of VLSI Circuits

Table 1

Parametric Comparison of the Proposed and existing methods in the field.

	Existing techniques		Proposed technique
	Maze routing analysis	Density analysis	Perimeter degree technique (PDT)
H- overflow	9	218	515
V -overflow	219	250	2132
Total amount of overflow	178	344	2647
Maximum amount of overflow (1GRC)	22	22	28