Research Article
Design of Binary and Ternary Logic Inverters Based on Silicon Feedback FETs Using TCAD Simulator
Figure 4
Simulated drain current as a function of gate voltage for different doping levels for (a) p-FBFET. The blue, green, red curves present the I–VG curve with doping level of , , and , respectively. (b) I–VG for n-FBFET. The blue, green, red, and black curves present the I–VG curve with a doping level of , , , and , respectively.
| (a) |
| (b) |