Optimally Matched 189-232 GHz 6.8 dBm Output Power CMOS Frequency Doubler

<div>(a) Simulated <svg height="11.9087pt" id="M6" style="vertical-align:-3.2728pt" version="1.1" viewbox="-0.0498162 -8.6359 20.7841 11.9087" width="20.7841pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M673 297H417L411 270C517 261 522 258 506 183L487 92C476 38 428 19 360 19C207 19 123 132 123 287C123 472 243 631 441 631C557 631 617 583 617 469L647 472C650 545 655 604 658 632C625 643 554 666 467 666C201 666 23 502 23 278C23 90 156 -16 339 -16C410 -16 501 6 569 24C566 43 567 70 573 101L589 183C604 259 607 262 667 271L673 297Z"></path></g><g transform="matrix(.0091,0,0,-0.0091,8.827,3.132)"><path d="M797 0V26C739 32 732 36 732 103V296C732 394 682 449 605 449C576 449 550 437 529 423C504 407 475 389 446 366C425 418 382 449 334 449C303 449 279 437 253 421C222 403 201 385 180 371V452C135 432 85 419 41 411V388C99 379 102 374 102 310V103C102 38 93 32 27 26V0H238V26C189 32 180 38 180 103V338C210 363 250 390 289 390C351 390 377 348 377 275V103C377 37 368 32 306 26V0H520V26C465 32 456 38 456 101V296C456 314 455 326 453 338C491 369 529 390 565 390C628 390 653 345 653 274V107C653 36 642 32 583 26V0H797Z"></path></g><g transform="matrix(.0091,0,0,-0.0091,16.243,3.132)"><path d="M380 106C343 72 306 56 265 56C195 56 116 112 115 248C235 252 361 262 377 265C396 269 400 277 400 297C400 374 333 449 250 449H249C198 449 144 421 103 376S37 269 37 201C37 88 109 -12 232 -12C263 -12 332 6 395 84L380 106ZM225 412C281 412 315 364 314 312C314 297 308 292 290 292C232 290 176 289 120 289C135 370 180 412 225 412Z"></path></g></svg> of NMOS (size: <svg height="8.69875pt" id="M7" style="vertical-align:-0.3499298pt" version="1.1" viewbox="-0.0498162 -8.34882 32.3604 8.69875" width="32.3604pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M456 178V225H360V632H320C217 496 115 347 20 206V178H280V106C280 40 276 34 189 27V0H445V27C364 34 360 39 360 106V178H456ZM280 225H82C149 335 214 431 278 520H280V225Z"></path></g><g transform="matrix(.013,0,0,-0.013,9.146,0)"><path d="M528 54L331 254L528 455L492 493L294 291L96 493L60 455L257 254L60 54L96 16L294 217L492 16L528 54Z"></path></g><g transform="matrix(.013,0,0,-0.013,19.682,0)"><path d="M285 378C315 398 338 416 353 432C373 451 384 474 384 503C384 579 325 635 236 635H235C182 635 136 610 108 579L65 516L85 496C110 533 150 575 205 575C258 575 300 543 300 481C300 407 232 369 141 339L147 310C163 315 188 321 211 321C268 321 338 284 338 192C338 94 288 40 217 40C160 40 119 68 93 91C85 98 77 97 69 91C60 84 47 71 46 58C44 46 48 35 62 22C75 10 116 -12 162 -12C234 -12 424 62 424 224C424 297 373 359 285 376V378Z"></path></g><g transform="matrix(.013,0,0,-0.013,25.922,0)"><path d="M412 140C382 77 369 73 315 73H129L270 222C362 320 402 379 402 466C402 571 322 635 234 635C177 635 130 609 99 576L42 495L64 475C90 514 133 568 201 568C274 568 318 519 318 435C318 349 255 267 193 193C144 135 87 78 32 23V0H405C417 45 427 89 440 131L412 140Z"></path></g></svg> <i>μ</i>m/40 nm) pairs and (b) simulated output power of DA with various input power levels.</div>

International Journal of RF and Microwave Computer-Aided Engineering

fig3

Figure 3

Figure 3: Optimally Matched 189-232 GHz 6.8 dBm Output Power CMOS Frequency Doubler 