A New High-Performance Digital FM Modulator and Demodulator for Software-Defined Radio and Its FPGA Implementation

Table 5

Comparison result for DDFS.

Reference	Ours (pipelined)	Xilinx core [35]	CORDIC [36]	Nicholas [37]	[38]	[39]
Output SFDR	−64.3 dBc	N/A	−90.3 dBc	−90.3 dBc	N/a	−95.2 dBc
𝐿,𝑊,𝐾^∗	18, 10, 8	30, 10, 14	32, 15, 14	32, 15, 14	16, N/A, N/A	32, 15, 14
Area	75 Slices	212 Slices	440 Slices	101 Slices	248 CLBs	101 Slices
Frequency	334.5 MHz	72 MHz	113 MHz	121 MHz	62.1 MHz	121 MHz
BRAMs	0	0	0	2	0	2
Device	XC2VP 30-7	N/A	XCV 300-4	XCV 300-4	XC 4020xl	XCV 300-4

*where 𝐿 is the accumulator length, 𝑊 is the word length of truncated phase, and 𝐾 is the word length of DDFS output.