Research Article
High-Level Synthesis of In-Circuit Assertions for Verification, Debugging, and Timing Analysis
Algorithm 2
Adding timing assertions individually to backprojection.
| for(y=0;y<512;y++) | |
{
| | time1 =c1ock(); | | for(x=0;x<512;x++) | | {//compute pixel | | ⋯ | | } | | time2=clock(); | | assert((time2-time1)<1024)); | | assert((time2-time1)<640)); | | assert((time2-time1)<576)); | | assert((time2-time1)<544)); | | assert((time2-time1)<528)); | | assert((time2-time1)<520)); | | assert((time2-time1)<516)); | | assert((time2-time1)<514)); | | assert((time2-time1)<513)); | | assert((time2-time1)<512)); | | ⋯ | |
}
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