Research Article

PCIU: Hardware Implementations of an Efficient Packet Classification Algorithm with an Incremental Update Capability

Table 5

The performance achieved by all implementations in terms of classification/preprocessing.

BenchmarkClassification (Packet/sec) Preprocessing (Rule/sec)
MB soft Hw/SwDesktop Handel C MB soft Hw/Sw Desktop

ACL (10 K) 408.23 3,787.58 200,413.22 5,565,677.97 5.92 18.41 38,412.00
FW (10 K) 453.67 4,127.66 207,264.96 6,403,975.82 5.68 18.40 40,863.83
IPC (10 K) 458.87 4,055.18 214,128.04 6,556,710.84 5.66 19.24 38,412.00

Average 440.26 3,990.14 207,268.74 6,175,454.88 5.76 18.68 39,229.28