An NoC Traffic Compiler for Efficient FPGA Implementation of Sparse Graph-Oriented Workloads

Table 1

Application graphs.

Graph	Nodes	Edges	Max
			Fanin	Fanout
BSP Compute Model [3]
ConceptNet
cnet-small	14556	27275	226	2538
cnet-default	224876	553837	16176	36562
Matrix-Multiply
add20	2395	17319	124	124
bcsstk11	1473	17857	27	30
fidap035	19716	218308	18	18
fidapm37	9152	765944	255	255
gemat11	4929	33185	27	28
memplus	17758	126150	574	574
rdb3200l	3200	18880	6	6
utm5940	5940	83842	30	20
Bellman-Ford
ibm01	12752	36455	33	93
ibm05	29347	97862	9	109
ibm10	69429	222371	137	170
ibm15	161570	529215	267	196
ibm16	183484	588775	163	257
ibm18	210613	617777	85	209
Token Dataflow Compute Model [4]
bcspwr01	753	985	3	6
mux8	1037	1395	3	8
ringosc	2883	3866	3	4
psadmit1	9814	13356	3	10
dac	43000	67265	3	10
psadmit2	22259	30108	3	11
sandia01	40400	55765	3	8
sandia02	40400	55765	3	8
s208	43055	62067	3	11
bcspwr09	221807	391654	3	53
s298	70928	106247	3	13
s344	70666	103314	3	12
s349	73914	108888	3	14
s382	81060	119475	3	16
s444	90288	133901	3	16
s386	100637	151868	3	20
s510	220092	380930	3	54
s526	146442	228017	3	26
s641	212474	348453	3	39
10stages	124720	178396	3	8
circuit2	416454	747587	3	172