Reduced-Precision Redundancy on FPGAs

Table 1

Summary of the possible upset cases for a general RPR module.

Upset case	Probability	Noise signal added	Absolute noise limit (𝐸RPR)
DU	𝑃upset⋅𝑎	𝜖𝑒	𝜖max
UU	𝑃upset⋅(1−𝑎)	𝜖𝑢	𝑇ℎ
FD	(1−𝑃upset)⋅𝑃fp	𝜖𝑒	𝜖max
NU	(1−𝑃upset)⋅(1−𝑃fp)	0	0