Research Article
Exploring Many-Core Design Templates for FPGAs and ASICs
Table 5
37-Node. Performance comparison between MARC, Hand-optimized, and GPGPU.
| | Configuration | Per iteration | Relative | | Time (s) | Perf. |
| | GPGPU scaled reference | 312 | 0.0119 | | MARC-Ropt-F | 5130 | 0.0007 | | MARC-C1-F | 310 | 0.0120 | | MARC-C2-F | 221 | 0.0169 | | MARC-C4-F | 235 | 0.0158 | | Hand design FPGA | 110 | 0.0339 | | MARC-Ropt-A | 38.1 | 0.0978 | | MARC-C1-A | 5.02 | 0.7429 | | MARC-C2-A | 4.53 | 0.8231 | | MARC-C4-A | 4.61 | 0.8083 | | Hand design ASIC | 3.73 | 1.0000 |
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