Performance Analysis Techniques for Multi-Soft-Core and Many-Soft-Core Systems

<table class="table-group" id="tab2"><tr><td><table class="table"><tr><td class="thead-hr" colspan="3"><hr/></td></tr><tr class="thead"><td align="left">Operand A (type of operation)</td><td align="center">Operand B (address)</td><td align="center">Operation description</td></tr><tr><td class="thead-hr" colspan="3"><hr/></td></tr><tr><td align="left">00</td><td align="center">—</td><td align="center">Enables logging</td></tr><tr><td align="left">01</td><td align="center">—</td><td align="center">Disables logging</td></tr><tr><td align="left">02</td><td align="center">Function address</td><td align="center">Sends the address of a call</td></tr><tr><td align="left">03</td><td align="center">Function address</td><td align="center">Sends the address of a ret</td></tr><tr class="table-tr"><td colspan="3"><hr class="tbody-hr"/></td></tr></table></td></tr></table>

Operations implemented by the NIOS custom instruction devoted to tracing.

International Journal of Reconfigurable Computing

tab2

Table 2

Table 2: Performance Analysis Techniques for Multi-Soft-Core and Many-Soft-Core Systems 