An Impulse-C Hardware Accelerator for Packet Classification Based on Fine/Coarse Grain Optimization

Table 7

Impulse-C: FPGA Resource Utilization for PCIU Design.

Resources	Implementation
	Preprocessing	Classification
		Baseline	FGO (BCD)	CGO	PCGO
Block RAM	3,077	641	642	647	711
Slice Reg	1,019	4,816	8,970	10,123	24,187
Slice LUTS	2,827	888,597	1,768,713	1,766,927	1,666,331
Slice LUT-FF	3,053	890,467	1,776,316	1,771,434	1,674,215
Maximum Freq (MHz)	148.478	103.896	107.66	112.717	65.542