Hardware Accelerators Targeting a Novel Group Based Packet Classification Algorithm

Table 5

Impulse-C design specification.

Specification	Slice Reg	Slice LUTs	LUTs (logic)	LUTs (memory)
Baseline	1176	1644	1598	46
Fine-Grained	3383	2878	2878	0
Specification	LUT-FF-Pairs	Unique-Control-Sets	Number-of-IOs	Clock-Period (ns)
Baseline	2233	30	73	4.587
Fine-Grained	5316	65	169	5.282