Research Article
Hardware Accelerators Targeting a Novel Group Based Packet Classification Algorithm
Table 9
GBSA: comparison with hardware based packet classification accelerators.
  |  | Implementation  |  Language  | Throughput  |  Platform  |  
  |  |  Xtensa [28]  |  TIE  |  2.1 Gbsp  |  ASIP  |  |  2sBFCE [19]  |  VHDL  |  1.87 Gbps  |  FPGA  |  |   DCFL [14]  |  VHDL  |  16 Gbps  |  TCAM  |  |  GBSA Xtensa  |  TIE  |  3 Gbps  |  ASIP  |  |  GBSA ESL I  |  Handel-C  |  1.5 Gbps  |  FPGA  |  |  GBSA ESL II  |  Impulse-C  |  1.4 Gbps  |  FPGA  |  |  HyperCuts [24]  |  VHDL  |  3.41 Gbps  |  FPGA  |  
  |  
  |