Modules for Pipelined Mixed Radix FFT Processors

Table 2

64-point FFT processors configured in Xilinx FPGAs.

FPGA series	Hardware volume,; CLBs + DSP48	Maximum clock frequency, MHz	Reference
Spartan-3E	758 + 8	170	[18]
	1063 + 12	116	[19]
	1984 + 4	127	Proposed
Virtex-5	695 + 24	384	[20]
	628 + 4	325	Proposed