A Methodology for an FPGA Implementation of a Programmable Logic Controller to Control an Atomic Layer Deposition System

Table 1

Dictionary of ladder logic functions with their Verilog equivalents.

LD function	LD XML	Verilog text
and	and	&&
or	or
NO contact	xic(a)	a
NC contact	xio(a)	!a
Comparator ≥	GEQ(a, b)	(a≥b)
Comparator ==	EQu(a, b)	(a==b)
One shots relay	ONS(a)	(a&&!prev_a)
FB timer	TON()	Timer()
FB counter	CTU()	Counter()