Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation

Listing 1

Latch description in LMAC2.

(1)	always @ () begin
(2)	pre_pkt_we_wire =
(3)	!rst_ ? 1′b0:
(4)	<…cond1…> ? 1′b0:
(5)	<…cond2…> ? 1′b0:
(6)	<…cond3…> ? 1′b1:
(7)	pre_pkt_we_wire
(8)	;
(9)	end