International Journal of Reconfigurable Computing

Research Article

Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation

Table 3

Extended features of identified open-source Ethernet MAC IP cores.
ProjectMDIODefault datapath width (bits)DMARX FIFOTX FIFORX RAM bufferTX RAM bufferFCSVLANPTP supportMAC address filteringMAC address insertionHalf duplex
An Ethernet Controller [24]—32Yes——————————
Ariane-Ethernet [25]Yes64—YesYesYesYesYes——Yes——
Gaisler GRETH [26]Yes32YesYesYes——Yes——Yes—Yes
LeWiz LMAC1 [27]—64—YesYes——YesYes—YesYes—
LeWiz LMAC2 [28]—64—YesYes——YesYes—YesYes—
LeWiz LMAC3 [29]—256—YesYes——YesYes—YesYes—
Litex Liteeth [30]Yes32—YesYesYesYesYes—————
NFMAC10G [31]—64—YesYes——Yes—————
Opencores Ethernet Tri Mode [32]Yes32—YesYes——Yes——YesYesYes
Opencores Ethmac [33]Yes32YesYesYes——Yes——YesYesYes
Opencores Gbiteth [34]Yes32YesYes—YesYesYesYes—Yes——
Opencores Minimac [35]Yes32YesYesYes————————
Opencores XGE_LL_MAC [36]—64—————Yes—————
Opencores XGE_MAC [37]—64—YesYes——Yes—————
P. Kerling Ethernet MAC [38]Yes8—YesYes——Yes——YesYes—
Verilog-Ethernet [39]—64, 8—YesYes——Yes—Yes———
WGE 100 [40]Yes32—YesYes——Yes——Yes——
WhiteRabbit [41]—16—YesYes——YesYesYes———