Research Article
A Modified Seven-Level Inverter with Inverted Sine Wave Carrier for PWM Control
Figure 2
(a) Current path and switching plan for making +3VDC at load. (b) Current path and switching plan for making +2VDC at load. (c) Current path and switching plan for making +VDC at load. (d) Current path and switching plan for making 0VDC at load. (e) Current path and switching plan for making −VDC at load. (f) Current path and switching plan for making −2VDC at load. (g) Current path and switching plan for making −3VDC at load. (h) Cyclic switching sequence of chosen MLI.
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