Analysis of Different PWM Techniques for Enhanced Ultrahigh Gain Z-Network Topology

Table 1

Inverter Input and output parameters.

D = 0.1, Vin = 70 V, B = 4.583 (MCBC)
Theoretical	1.03 (M)	320.1 V (Vdc link)	128.4 V (V-line)
Simulated	1.03 (M)	318.6 V (Vdc link)	126.4 V (V-line)
D = 0.1, Vin = 70 V, B = 4.583 (MBC)
Theoretical	1.088 (M)	345 V (Vdc link)	317 V (V-line)
Simulated	1.088 (M)	344.7 V (Vdc link)	315.9 V (V-line)