A VLSI Implementation of Rank-Order Searching Circuit Employing a Time-Domain Technique

Table 1

Specifications of the proof-of-concept chip.

Technology	1P5M 0.18 𝜇m CMOS
Supply voltage	1.8 (V)(Core) 3.3 (V)(I/O Buffers)
Core size	0.006 (mm^2)
Accuracy	9.5 (ns)
Power consumption	132.3 (𝜇W)
Latency	2.432 (𝜇s) at 8-bit resolution
Function	Rank-order location identification