Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-<mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mrow><mml:msub><mml:mi>V</mml:mi><mml:mrow><mml:mi mathvariant="bold">t</mml:mi><mml:mi mathvariant="bold">h</mml:mi></mml:mrow></mml:msub><mml:mo>/</mml:mo><mml:msub><mml:mi>V</mml:mi><mml:mrow><mml:mi mathvariant="bold">d</mml:mi><mml:mi mathvariant="bold">d</mml:mi></mml:mrow></mml:msub></mml:mrow></mml:math> Library and Device Sizing

<table>Power yield improvement against deterministic worst-case approach with different level conversion strategies and timing yield constraint of 95%.</table>

Journal of Electrical and Computer Engineering

fig13

Figure 13

Figure 13: Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-<mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mrow><mml:msub><mml:mi>V</mml:mi><mml:mrow><mml:mi mathvariant="bold">t</mml:mi><mml:mi mathvariant="bold">h</mml:mi></mml:mrow></mml:msub><mml:mo>/</mml:mo><mml:msub><mml:mi>V</mml:mi><mml:mrow><mml:mi mathvariant="bold">d</mml:mi><mml:mi mathvariant="bold">d</mml:mi></mml:mrow></mml:msub></mml:mrow></mml:math> Library and Device Sizing 

Journal of Electrical and Computer Engineering

Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-Vth/Vdd Library and Device Sizing

Figure 13