Intermediate Frequency Digital Receiver Based on Multi-FPGA System

Table 1

The layer assignment of PCB.

	Symbol	Description
(1)	Top	Element layer
(2)	GND/CLK	Analog ground/clock
(3)	S2	Signal layer
(4)	P1	Power layer
(5)	SGND	Digital ground
(6)	S3	Signal layer
(7)	P2	Power layer
(8)	Bottom	Element layer