Design of a Novel Decimal to Multicode Converter in QCA Technology

Table 2

Details of the proposed circuit.

Items	Decimal to excess-3, BCD, and gray codes converter
Cell count	380
Delay (clock phases)	7
New 4-input block count	5
Majority gate count	8
Inverter gate count	1
Power consumption	1.71 e − 001 eV
Number of layers	3