Design and Development of Efficient SRAM Cell Based on FinFET for Low Power Memory Applications

Table 6

Performance of proposed SRAM cells in write mode.

SRAM (T)	Transistor	Power (nW)	Delay (ns)	PDP (nJ)	Percentage improvement
6	MOSFET	78.92	60.02	4736	68.58
	FinFET	24.53	60.69	1488
10	MOSFET	70.46	44.69	3148	80.80
	FinFET	18.82	32.02	602