An Algorithm for Generating Boolean Expressions in VHDL Based on Ladder Diagrams

Algorithm 3

Function-1: main body of the algorithm.

Function-1: ConvertRungsIntoAndOrTree

Input: a ladder diagram LD

Output: an AND-OR tree that corresponds to LD

for rung: LD.rungs

    currentNode ← rung.nodes

    currrentDic ← new Dictionary<Node, List<Node>>( )

    ConstructAndOrTree(currentNode, currentDic)

end for