Design and Implementation of Cache Memory with Dual Unit Tile/Line Accessibility

Table 8

Hardware scale for the 8-way set associative cache (number of NAND gate equivalents).

		64-byte cache line, 8-way
	Cache memory	Non-ATSRA	ATSRA
	Conventional	54430	54430
Peripheral circuit scale	Proposed	260990	133221
	P/C	2.00	2.00
	Conventional	105440	105440
Tag memory scale	Proposed	105440 × 4	105440
	P/C	4.00	1.00
	Conventional	1353840	1353840
Data memory scale	Proposed	1353840	1353840
	P/C	1.00	1.00
	Conventional	1513710	1513710
Entire cache scale	Proposed	2036590	1592491
	P/C	1.34	1.05