Design and Optimization of 2.1 mW ULP Doherty Power Amplifier with Interstage Capacitances Using 65 nm CMOS Technology

Figure 6

(a) Subthreshold operation of the main amplifier and (b) the peaking amplifier with distinctive gm values, operating much lower than the pinch-off point. (c) The transient output voltage (red dotted line) and the transient output current (brown dotted line) at −20 dBm input voltage. (d) The same simulation results as seen in (c) for −7 dBm inputs.

(a)

(b)

(c)

(d)