Automatic Arrhythmia Detection Based on the Probabilistic Neural Network with FPGA Implementation

Table 3

Comparative analysis of the proposed arrhythmia classification’s FPGA implementation with some of the existing work.

Parameters	[7]	[15]	[22]	[11]	Proposed work
No. of classes of arrhythmia	2	NA	2	5	8
Set of features	1	3	1	7	6
Training data	120	NA	Not mentioned	5000	6300
Hardware used	Artix-7	Virtex-6	Zynq	Virtex-5	Artix-7
Number of slice registers	2474 out of 126800	1540 out of 93120	Not mentioned	3130 out of 28800	1925 out of 126800
Number of fully used LUT-FF pairs	0 out of 1	260 out of 5604	5454 out of 10944	6149 out of 28800	0 out of 1
Number of bonded IOBs	27 out of 210	30 out of 240	Not mentioned	Not mentioned	187 out of 210
Number of BUFG/BUFGCTRLs	1 out of 32	1 out of 32	2 out of 32	Not mentioned	1 out of 32
Time consumption	Not mentioned	Not mentioned	Not mentioned	21.79 sec	17 sec
Consumed on-chip power	Not mentioned	Not mentioned	Not mentioned	Not mentioned	25 mW
Accuracy	98.3%	NA	99.82%	96.05%	98.27%