Efficient (Masked) Hardware Implementation of Grain-128AEADv2

<div>The <svg height="11.2576pt" id="M314" style="vertical-align:-0.04979992pt" version="1.1" viewbox="-0.0498162 -11.2078 13.0997 11.2576" width="13.0997pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M384 0V27C293 34 287 42 287 114V635C232 613 172 594 109 583V559L157 557C201 555 205 550 205 499V114C205 42 199 34 109 27V0H384Z"></path></g><g transform="matrix(.0091,0,0,-0.0091,6.24,-5.741)"><path d="M327 325C324 350 312 408 304 433C283 442 256 451 213 451C120 451 59 391 59 320C59 243 125 210 188 181C237 158 266 136 266 93C266 52 231 24 195 24C134 24 93 81 74 148L42 143C42 106 51 37 59 23C78 8 125 -12 177 -12C257 -12 345 35 345 127C345 198 292 234 216 264C171 283 131 305 131 348C131 387 156 416 195 416C243 416 277 378 297 317L327 325Z"></path></g><g transform="matrix(.0091,0,0,-0.0091,9.616,-5.741)"><path d="M303 37L293 66C280 59 256 49 231 49S173 63 173 143V396H281C294 404 298 428 287 439H173V575L158 577L92 509V439H46L17 408L22 396H92V107C92 27 128 -12 192 -12C203 -12 218 -9 237 2L303 37Z"></path></g></svg> order masked hardware implementation of <svg height="8.8423pt" id="M315" style="vertical-align:-0.2064009pt" version="1.1" viewbox="-0.0498162 -8.6359 9.02496 8.8423" width="9.02496pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M673 297H417L411 270C517 261 522 258 506 183L487 92C476 38 428 19 360 19C207 19 123 132 123 287C123 472 243 631 441 631C557 631 617 583 617 469L647 472C650 545 655 604 658 632C625 643 554 666 467 666C201 666 23 502 23 278C23 90 156 -16 339 -16C410 -16 501 6 569 24C566 43 567 70 573 101L589 183C604 259 607 262 667 271L673 297Z"></path></g></svg> with the pipeline-like pre-computation technique.</div>

Security and Communication Networks

Efficient (Masked) Hardware Implementation of Grain-128AEADv2

Figure 7