The On-Chip D-LMS Filter Design Method of Wireless Sensor Node Based on FPGA

Table 1

Indicators of key devices.

Function unit	Main components	Technical index
FPGA	Spartan6-XC6SLX16-FT256	Basic logic units: 14,579; configurable logic blocks: 18,224; embedded memory block capacity: 576 KB; DSP computing core: 32; IO interfaces: 186.
ARM	STM32F407VET6	Maximum frequency: 168 MHz; maximum flash memory: 1 MB; IO interfaces: 140; 12 16-bit timers; 2 32-bittimers; each timer has up to 4 IC/OC/PWMs.
ADC	MAX1308	Power supply: ±5 V; conversion accuracy: 12 bit; number of channels: 8; maximum sampling rate: 500 Ksps/channel; input range: 9 V; operating temperature: −40°C to +85°C.
WIFI	W5500	Supports LWIP, TCP, UDP, ICMP, IPv4, ARP, and IGMP; a built-in 32 KB large-capacity transceiver buffer unit; supports speed adaptivity and full duplex and half duplex communication.
FLASH	MT29F4G08AFABA	Storage capacity: 4G; block size: 64 pages (128K + 4 KB); page size: 2,112 bytes (2,048 + 64 bytes); operating temperature: −40°C to +85°C.