Research Article
A High-Speed and Low-Offset Dynamic Latch Comparator
Table 1
Transistor dimensions used in this proposed topology.
| | Transistors | (m) | (m) | factor |
| | 4 | 4 | 12 | | 2 | 0.18 | 1 | | 4 | 2 | 1 | | 4 | 2 | 1 | | 4 | 4 | 12 | | 2 | 0.18 | 1 | | 4 | 2 | 1 | | 2 | 0.18 | 1 | | 4 | 2 | 1 | | 6 | 1 | 2 | | 2 | 1 | 1 | | 2 | 1 | 1 | | 2 | 0.18 | 1 |
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