Low Power Adder Based Auditory Filter Architecture

Table 1

Leakage power of the existing and proposed logics of input pattern generator.

	Existing DA based filter architecture	Proposed DA based filter architecture		% gain
	using XOR gate [12]	using MUX
Cell	XOR	MUX	INV
Number of cells	4	4	1
C_Lp (nW)	109.06	67.55	16.06
T_Lp (nW)	438.4	286.26		34.61

Note: C_Lp: cell leakage power; T_Lp: total leakage power.