Research Article

Network-Assisted Full-Duplex Enabled Ultrareliable and Low-Latency Communications

Table 1

CP latency in TTIs in TDD/FDD/NAFD systems.

Latency compositionTDD latencyFDD latencyNAFD latency

Worst-case delay due to random access channel (RACH) scheduling period2TTI1TTI2TTI
Transmission of RACH preamble1TTI1TTI1TTI
Preamble detection and processing in BS1TTI1TTI1TTI
DL slot alignment1TTI0TTI0TTI
Transmission of random access (RA) response1TTI1TTI1TTI
UE processing delay1TTI1TTI1TTI
UL slot alignment1TTI0TTI0TTI
Transmission of RRC connection resume request1TTI1TTI1TTI
Processing delay in BS3 ms3 ms3 ms
DL slot alignment1TTI0TTI0TTI
Transmission of RRC connection resume1TTI1TTI1TTI
Processing delay in the UE3 ms3 ms3 ms
UL slot alignment1TTI0TTI0TTI
Transmission of RRC connection resume complete1TTI1TTI1TTI
Processing delay in BS1TTI1TTI1TTI
Total delay14TTI + 6 ms9TTI + 6 ms10TTI + 6 ms