Deep-Sea: A Reconfigurable Accelerator for Classic CNN

Table 2

Analysis of system resources and performance under different architecture reconfiguration.

Architecture	Slice LUT	Slice	LUT logic	DRAM	BRAM	DSPs	Processing time (ms)	FPS
4-4	21757	8632	20285	1472	59	181	149.94	5.67
4-16	64391	25105	59034	5357	155	673	48.92	20.03
4-32	120593	46332	110119	10474	283	1329	31.98	31.27