Design and Implementation of Shared Memory for Turbo and LDPC Code Interleaver

Algorithm 2

Interleaving in different modulation order.

	Input: e, the preinterleaving sequence.
	Output: f, the postinterleaving sequence.
	fortodo
	forto 31 do
	if order = = 2, then
	else if order = = 4, then
	else
	end
	end
	end