Accelerated and Highly Correlated ASIC Synthesis of AI Hardware Subsystems Using CGP

Table 4

Average number of generations (gens) and nodes required to achieve full fitness for 8-bit activation function synthesized circuits for all configurations.

Function	CGP nodes	Config-1 (gens, nodes)	Config-2 (gens, nodes)	Config-3 (gens, nodes)	Config-4 (gens, nodes)
Gaussian	Basic gates	9.33E + 06, 19	6.05E + 07, 144	2.96E + 07, 91	4.80E + 06, 44
	Std cells	2.94E + 06, 9	4.63E + 07, 105	2.42E + 07, 55	9.75E + 06, 33
GeLU	Basic gates	4.58E + 06, 23	1.76E + 07, 54	1.76E + 07, 54	2.23E + 07, 49
	Std cells	9.81E + 05, 17	7.86E + 06, 36	7.86E + 06, 36	4.63E + 06, 32
Sigmoid	Basic gates	5.57E + 06, 26	3.48E + 07, 98	3.48E + 07, 98	3.72E + 07, 80
	Std cells	6.18E + 06, 17	3.31E + 07, 61	2.30E + 07, 62	2.03E + 07, 46
Softplus	Basic gates	8.84E + 04, 9	3.85E + 07, 90	3.85E + 07, 90	2.12E + 07, 51
	Std cells	2.74E + 05, 8	1.60E + 07, 49	1.60E + 07, 49	3.97E + 06, 31
tanh	Basic gates	5.21E + 06, 22	5.92E + 07, 131	4.49E + 07, 104	1.98E + 07, 66
	Std cells	4.65E + 06, 11	3.46E + 07, 82	2.21E + 07, 61	9.55E + 06, 37