Design of Ultrasmall Plasmonic Logic Gates Based on Single Nanoring Dielectric-Metal-Dielectric Waveguide

Figure 24

(a) XNOR logic gate circuit symbol and (b) the truth table. The ports 2 and 3 are considered as input ports. The ports 1 and 4 are assumed to be the control and output ports, respectively.

(a)

(b)