A Decision-Making Method Providing Sustainability to FPGA-Based SoCs by Run-Time Structural Adaptation to Mode of Operation, Power Budget, and Die Temperature Variations

Table 4

Flow of events discussed in Section 7.

Case no.	Time elapsed (hours)	System mode	Battery capacity (%)	Required lifetime (hours)	PTPC (W)	PDTR (°C)	ESTPC (W)	ESDT (W)	Achieved lifetime (hours)
1	0		100.00	8	6	68–70	5.48	69.79	8.76
2	0.25		97.15	7.75	6	68–70	5.09	65.17	9.17
3	0.25		94.5	7.5	6	68–70	5.48	69.79	8.28
4	0.5		88.79	7	6	64–66	5.09	65.17	8.38
5	0.5		83.49	8.25	4.86	61–63	4.83	62.12	8.30
6	0.25		81	8	4.86	61–63	4.81	61.89	8.08
7	0.25		78.47	6.75	5.6	64–66	5.15	65.87	7.32
8	1		67.75	5.75	5.6	66–68	5.28	67.49	6.16