Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation

Table 5

Additional OOC synthesis resource results.

Project	Variant	Additional FPGA resources
Ariane-Ethernet [25]	—	ODDR: 6, IDELAYE2: 5, IDDR: 5, IDELAYCTRL: 1, BUFIO: 1
Litex Liteeth [30]	liteeth-rgmii	ODDR: 6, IDELAYE2: 5, IDDR: 5, OBUF: 6, IBUF: 6, PLLE2_ADV: 1
P. Kerling Ethernet MAC [38]	pkerling_ethernet_mac	ODDR: 1, IDELAYE2: 10, IBUF: 1
P. Kerling Ethernet MAC [38]	pkerling_ethernet_mac_with_fifos	ODDR: 1, IDELAYE2: 10, IBUF: 1
Verilog-Ethernet [39]	verilog-ethernet-eth_mac_1g_gmii_fifo	ODDR: 1, BUFIO: 1
Verilog-Ethernet [39]	verilog-ethernet-eth_mac_1g_rgmii_fifo	ODDR: 6, IDDR: 5, BUFIO: 1
Verilog-Ethernet [39]	verilog-ethernet-eth_mac_mii_fifo	BUFIO: 1
WGE 100 [40]	—	ODDR: 1