Research Article
Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation
| | Project | Variant | Clocks | Clock pairs | Total | Critical | CDC-1 | CDC-2 | CDC-4 | CDC-5 | CDC-6 | CDC-7 | CDC-10 | CDC-11 | CDC-12 | CDC-13 | CDC-14 | CDC-15 | CDC-26 |
| | An Ethernet Controller | — | 1 | N/A | N/A | N/A | — | — | — | — | — | — | — | — | — | — | — | — | — | | Ariane-Ethernet | — | 2 | 2 | 7 | 4 | — | 1 | — | 2 | — | 1 | 2 | — | — | 1 | — | — | — | | Gaisler GRETH | — | 3 | 4 | 148 | 81 | 44 | 1 | 1 | — | — | 2 | 2 | — | — | 32 | — | 66 | — | | LeWiz LMAC1 | LMAC_CORE1_AXIS | 3 | 4 | 33140 | 4 | — | — | — | — | — | — | — | — | — | — | 4 | 33136 | — | | LeWiz LMAC1 | LMAC_CORE1_AXIS_XPM_FIFO | 3 | 2 | 48 | 0 | — | — | — | — | — | — | — | — | — | — | — | 48 | — | | LeWiz LMAC1 | LMAC_CORE_TOP | 1 | N/A | N/A | N/A | — | — | — | — | — | — | — | — | — | — | — | — | — | | LeWiz LMAC1 | LMAC_CORE_TOP_XPM_FIFO | 1 | N/A | N/A | N/A | — | — | — | — | — | — | — | — | — | — | — | — | — | | LeWiz LMAC2 | LMAC_CORE2_TOP_XPM_FIFO | 1 | N/A | N/A | N/A | — | — | — | — | — | — | — | — | — | — | — | — | — | | LeWiz LMAC3 | LMAC_CORE3_TOP_XPM_FIFO | 1 | N/A | N/A | N/A | — | — | — | — | — | — | — | — | — | — | — | — | — | | Litex Liteeth | liteeth | 3 | 4 | 6 | 2 | — | — | — | — | 4 | — | 2 | — | — | — | — | — | — | | Litex Liteeth | liteeth-rgmii | 3 | 4 | 4 | 0 | — | — | — | — | 4 | — | — | — | — | — | — | — | — | | NFMAC10G | nfmac10g | 1 | N/A | N/A | N/A | — | — | — | — | — | — | — | — | — | — | — | — | — | | NFMAC10G | nfmac10g_with_user_intf | 4 | 4 | 8 | 8 | 4 | — | 4 | — | — | — | — | — | — | — | — | — | — | | Opencores Ethernet Tri Mode | clk_reg_is_clk_user | 12 | 23 | 649 | 445 | 363 | 2 | 28 | — | — | — | — | — | 4 | 46 | 4 | 202 | — | | Opencores Ethernet Tri Mode | clk_reg_is_not_clk_user | 13 | 32 | 659 | 455 | 369 | 2 | 32 | — | — | — | — | — | 4 | 46 | 4 | 202 | — | | Opencores Ethmac | — | 3 | 6 | 1132 | 373 | 365 | 20 | 2 | — | — | — | 6 | — | — | — | — | 739 | — | | Opencores Minimac | — | 3 | 4 | 5 | 0 | — | 5 | — | — | — | — | — | — | — | — | — | — | — | | Opencores XGE LL MAC | — | 1 | N/A | N/A | N/A | — | — | — | — | — | — | — | — | — | — | — | — | — | | Opencores XGE_MAC | xge_mac | 4 | 10 | 48 | 0 | — | 12 | — | 8 | — | — | — | — | — | — | — | — | 28 | | Opencores XGE_MAC | xge_mac_ramstyle | 4 | 10 | 20 | 0 | — | 12 | — | 8 | — | — | — | — | — | — | — | — | — | | P. Kerling Ethernet MAC | pkerling_ethernet_mac | 6 | 5 | 186 | 126 | 122 | — | — | — | — | — | — | — | — | 4 | — | 60 | — | | P. Kerling Ethernet MAC | pkerling_ethernet_mac_with_fifos | 7 | 6 | 264 | 204 | 200 | — | — | — | — | — | — | — | — | 4 | — | 60 | — | | Verilog-Ethernet | verilog-ethernet-eth_mac_10g_fifo | 4 | 7 | 31 | 8 | — | — | — | — | 3 | 4 | 4 | — | — | — | — | 20 | — | | Verilog-Ethernet | verilog-ethernet-eth_mac_1g_fifo | 4 | 7 | 37 | 8 | — | — | — | — | 3 | 4 | 4 | — | — | — | — | 26 | — | | Verilog-Ethernet | verilog-ethernet-eth_mac_1g_gmii_fifo | 7 | 12 | 62 | 15 | — | — | — | 1 | 4 | 8 | 4 | — | 2 | 1 | — | 39 | 3 | | Verilog-Ethernet | verilog-ethernet-eth_mac_1g_rgmii_fifo | 4 | 7 | 42 | 10 | — | — | — | 1 | 3 | 6 | 4 | — | — | — | — | 26 | 2 | | Verilog-Ethernet | verilog-ethernet-eth_mac_mii_fifo | 4 | 7 | 41 | 10 | — | — | — | — | 3 | 6 | 4 | — | — | — | — | 26 | 2 | | WGE 100 | — | 9 | 13 | 313 | 170 | 157 | 68 | 2 | 2 | — | — | 2 | — | — | 9 | — | 73 | — | | WhiteRabbit | wr-endpoint | 4 | 7 | 188 | 93 | 78 | 4 | — | — | 4 | 5 | 6 | 2 | — | 2 | — | 87 | — |
|
|
