Hardware Prototyping and Modelling of Prototype Filter for FBMC

<table class="table-group" id="tab6"><tr><td><table class="table"><tr><td class="thead-hr" colspan="2"><hr/></td></tr><tr class="thead"><td class="align_left">Resources</td><td class="align_center">Proposed design</td></tr><tr><td class="thead-hr" colspan="2"><hr/></td></tr><tr><td class="align_left">LUT</td><td class="align_center">5947</td></tr><tr><td class="align_left">FF</td><td class="align_center">6167</td></tr><tr><td class="align_left">DSP</td><td class="align_center">144</td></tr><tr><td class="align_left">BRAM</td><td class="align_center">16</td></tr><tr><td class="align_left">RAM as LUT</td><td class="align_center">332</td></tr><tr><td class="align_left">Total power</td><td class="align_center">189.853</td></tr><tr class="table-tr"><td colspan="2"><hr class="tbody-hr"/></td></tr></table></td></tr></table>

<div>FBMC demodulation resource utilization.</div>

Wireless Communications and Mobile Computing

tab6

Table 6

Table 6: Hardware Prototyping and Modelling of Prototype Filter for FBMC 